1. Field of the Invention
The invention relates in general to a semiconductor structure, a method for manufacturing a semiconductor structure and a semiconductor package and more particularly to a semiconductor structure using through silicon via technology, a method for manufacturing a semiconductor structure and a semiconductor package.
2. Description of the Related Art
As electronic products are directed towards slimness, light weight and compactness, the semiconductor structure using through silicon via (TSV) technology has become a mainstream trend. Referring to FIGS. 1A˜1G, perspectives of a method for manufacturing a semiconductor structure 900 using through silicon via technology are shown. The manufacturing method includes the following steps. Firstly, referring to FIG. 1A, a silicon wafer 910 having a first surface 910a and a second surface 910b is provided. Next, referring to FIG. 1B, an indent 910c is formed on the first surface 910a by dry etching. Then, referring to FIG. 1C, an insulating layer 920 made from silicon nitride material for example is formed by chemical vapor deposition (CVD) technology to cover the first surface 910a and the inner wall of the indent 910c. After that, referring to FIG. 1D, a copper material 940 is electroplated in the indent 910c. Then, referring to FIG. 1E, a conductive pad 950 is formed on the first surface 910a and covers the indent 910c. Afterwards, referring to FIG. 1F, the second surface 910b is polished until the copper material 940 filled in the indent 910c is exposed. Lastly, referring to FIG. 1G, another conductive pad 960 is formed on the second surface 910b and covers the indent 910c. Thus, a semiconductor structure 900 is formed.
The first surface 910a and the second surface 910b of the silicon wafer 910 can be contacted with each other through the conductive pad 950, the copper material 940 and the conductive pad 960. The copper material 940 and the first surface 910a are both protected by the insulating layer 920.
However, according to the conventional method for manufacturing the semiconductor structure 900, the insulating layer 920 is formed by CVD technology. As the CVD technology equipment is expensive, more manufacturing costs are incurred.
Furthermore, according to the conventional method for manufacturing the semiconductor structure 900, the copper material 940 is exposed by way of polishing the second surface 910b, not only incurring more manufacturing process and more time, but also easily damaging the silicon wafer 910. Thus, there are many bottleneck technologies in the through silicon via technology of the silicon wafer 910 that need to be resolved.